A MOSFET (Metal Oxide Semiconductor Field Effect Transistor) and an IGBT (Insulated Gate Bipolar Transistor) which are widely known as power semiconductor devices have a high-speed switching characteristic and a reverse blocking voltage (withstanding voltage) of a few dozens of volts to a few hundred volts. Power semiconductor devices of a MOSFET and an IGBT are widely used as power converters and controllers in home electric appliances, communication devices, and vehicle motors.
To achieve compactness, higher efficiency and lower power consumption of these power semiconductor devices, it is required to simultaneously achieve a high withstanding voltage and a low on resistance of the devices. As a configuration that simultaneously achieves a high withstanding voltage and a low on resistance, there is known a configuration in which a super-junction structure (hereinafter “SJ structure”) that has alternately arranged p-type and n-type semiconductor layers (p-pillar layers and n-pillar layers) is provided on a drift layer of a power semiconductor device.
In general, an SJ structure is manufactured by a multiepitaxial process that performs ion implantation and an epitaxial growth process at plural times. As another process, there has been studied a method of forming an SJ structure by selectively forming plural trenches in parallel at approximately equal intervals on an epitaxial layer that becomes a drift layer of a power semiconductor device and by filling in these trenches with p-type epitaxial layers. According to this method, the devices can be manufactured at low cost because a number of processes can be decreased by the multiepitaxial process.
However, this method has a problem in that it is difficult to fill high-quality epitaxial layers into the trenches in a short time. When a growth speed of the epitaxial layers is made fast, opening portions of the trenches are closed before the trenches are filled in because a speed of epitaxial growth at shoulders of the trenches is faster than the speed in the trenches. As a result, portions (voids) that are not sufficiently filled with the p-type epitaxial layers are formed in the trenches, and impurity concentrations of the p-pillar layers and impurity concentrations of the n-pillar layers become non-uniform. Further, impurity concentrations of the p-pillar layers and impurity concentrations of the n-pillar layers also become non-uniform because of manufacturing variations when forming the p-pillar layers.
Particularly, when the above problem occurs at both end portions of the p-pillar layers and in the p-pillar layers arranged at outermost peripheral portions of the device, and when impurity concentrations at these portions become higher (become in a p-rich state) than in surrounding n-pillar layers, depletion layers are excessively extended to a side surface direction of the device, and densities of equipotential lines become high (an electric field concentration occurs) at a termination portion. As a result, a high electric field is applied to both end portions of the p-pillar layers, and to a boundary portion between the p-pillar layers arranged at the outermost peripheral portions of the device and the surrounding n-pillar layers. Consequently, reliability of the device decreases.